The UnifiedBus architecture unifies multiple interconnection protocols, raises messaging speeds to the terabit level, and reduces latency to two microseconds.
Article index:
- Launch of the Atlas 960E SuperPod system in Shanghai
- Addressing the bottleneck in training 10-trillion-parameter models
- Advantages of the UnifiedBus architecture and high-speed optical interconnection
- Eliminating 196 kilometers of copper cables and launching the supercluster
- Air-cooled server systems for small and medium-sized enterprises
- Accelerating timelines for Ascend 960 chips and global competition
- Frequently asked questions
Launch of the Atlas 960E SuperPod system in Shanghai
Chinese firm Huawei officially announced the launch of its new supercomputing system, the Atlas 960E SuperPod, describing it as the world’s first supercomputing system relying on semi-enclosed combined optics technology. The announcement was made during the main keynote address delivered by Yang Chaobin, executive board member and CEO of Huawei’s ICT Infrastructure Business Group, at the Huawei Connect 2026 conference in Shanghai.
This revolutionary system enables the connection of up to 4,096 neural processing units from Huawei’s Ascend chips into a massive computing matrix operating as a unified electronic brain, bolstering the Chinese giant’s ability to challenge Nvidia’s global monopoly and provide integrated sovereign alternatives for building massive AI data centers.
Addressing the bottleneck in training 10-trillion-parameter models
During the conference, Huawei revealed that traditional computer architectures suffer from widespread operational waste, with actual computing power utilization in matrices comprising 100,000 processors not exceeding 20 percent, while the remainder stays idle waiting for complex data exchange processes between servers to complete.
The company explained that training giant artificial intelligence models exceeding the 10-trillion-parameter barrier generates massive amounts of intermediate data far surpassing the storage capacity of any single computing accelerator, making communication and network exchange speeds between chips the decisive metric for speed and productivity rather than raw processor counts alone.
Advantages of the UnifiedBus architecture and high-speed optical interconnection
To overcome this core technical challenge, Huawei introduced the UnifiedBus interconnection architecture, which merges more than ten different computer and network communication protocols into a single, highly advanced standardized protocol.
This innovative architecture helps raise the interconnection bandwidth between chips from hundreds of gigabytes to terabits per second, alongside reducing round-trip signal transmission latency from 7 microseconds to just 2 microseconds. The architecture also enables unified global memory addressing across the system and direct access between central processing units, accelerators, and solid-state fast storage units.
Eliminating 196 kilometers of copper cables and launching the supercluster
During the event, Huawei showcased pioneering hardware devices embodying this engineering leap. The Link Blade direct connection blade successfully eliminated approximately 196 kilometers of wires and copper cables inside each SuperPod system comprising 4,096 processors through a compact design completely free of complex wiring.
It also launched the UBG super network switch, which supports a fanout and access port capacity of up to 1024 ports, engineeringly paving the way to build a supercomputing cluster comprising one million neural processing units capable of training reasoning and knowledge models featuring tens of trillions of complex mathematical parameters.
Air-cooled server systems for small and medium-sized enterprises
Huawei’s innovations were not limited to giant cloud clusters for nations and major enterprises; it also deployed the UnifiedBus technology to serve the business sector and small and medium-sized enterprises by providing compact and economical computing devices.
The company revealed the possibility of connecting two standard air-cooled servers of the Atlas 650E model via this architecture to provide direct, switch-free communication across 16 neural processors. This allows companies, banks, and hospitals to train and run local, closed artificial intelligence models comprising one trillion parameters inside their traditional data centers without needing prohibitive liquid cooling investments.
Accelerating timelines for Ascend 960 chips and global competition
Huawei leadership announced the advancement of manufacturing and launch timelines for the advanced Ascend 960 chip family. The launch date for the Ascend 960DT training chip was brought forward by three quarters to the first quarter of 2027, while the release date for the Ascend 960BR inference chip was moved up by one quarter to the third quarter of the same year.
Eric Xu, Huawei’s rotating chairman, emphasized to the South China Morning Post that the advanced cluster aggregation approach spearheaded by Huawei will become the standard model adopted by all major technology companies worldwide in coming years to break physics barriers in data processing.
Frequently asked questions
Question: What is the most prominent engineering feature of Huawei’s Atlas 960E SuperPod system?
Answer: It is the world’s first system to rely on semi-enclosed combined optics to connect 4,096 chips into an ultra-fast computing unit.
Question: How does the UnifiedBus architecture address the bottleneck problem in training massive models?
Answer: It unifies communication protocols, raises transfer speeds to the terabit level, reduces latency to two microseconds, and provides shared memory addressing.
Question: When does Huawei plan to launch the new generation of Ascend 960 chips for training and inference?
Answer: The company advanced timelines to launch the training chip in Q1 2027 and the inference chip in Q3 2027.
